Single branch specified, using that and the previous one: remotes/brancher/net-next-2025-06-26--18-00 (v6.16-rc3-964-gd66f4030e40c) remotes/brancher/net-next-2025-06-26--21-00 (v6.16-rc3-981-g0cdc0aedd96a) ==== BASE IDENTICAL ==== ==== COMMIT DIFF ==== diff --git a/tmp/tmp.2XHm9momLl b/tmp/tmp.y1npG8eMc5 index 13705cb0af18..9b55156eb2f2 100644 --- a/tmp/tmp.2XHm9momLl +++ b/tmp/tmp.y1npG8eMc5 @@ -9,6 +9,9 @@ selftests: net: enable profiling tc_action dbg profile patch forwarding: set timeout to 3 hours +docs: fbnic: explain the ring config +docs: netdev: correct the heading level for co-posting selftests +eth: bnxt: take page size into account for page pool recycling rings ice: default to TIME_REF instead of TXCO on E825-C ice: move TSPLL init calls to ice_ptp.c ice: fall back to TCXO on TSPLL lock fail @@ -21,6 +24,20 @@ sfc: siena: eliminate xdp_rxq_info_valid using XDP base API tcp: remove inet_rtx_syn_ack() tcp: remove rtx_syn_ack field doc: tls: socket needs to be established to enable ulp +MAINTAINERS: Add maintainer for Qualcomm PPE driver +net: ethernet: qualcomm: Add PPE debugfs support for PPE counters +net: ethernet: qualcomm: Initialize PPE L2 bridge settings +net: ethernet: qualcomm: Initialize PPE queue to Ethernet DMA ring mapping +net: ethernet: qualcomm: Initialize PPE RSS hash settings +net: ethernet: qualcomm: Initialize PPE port control settings +net: ethernet: qualcomm: Initialize PPE service code settings +net: ethernet: qualcomm: Initialize PPE queue settings +net: ethernet: qualcomm: Initialize the PPE scheduler settings +net: ethernet: qualcomm: Initialize PPE queue management for IPQ9574 +net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574 +net: ethernet: qualcomm: Add PPE driver for IPQ9574 SoC +docs: networking: Add PPE driver documentation for Qualcomm IPQ9574 SoC +dt-bindings: net: Add PPE for Qualcomm IPQ9574 SoC NFC: trf7970a: Create device-tree parameter for RX gain reduction dt-bindings: net/nfc: ti,trf7970a: Add ti,rx-gain-reduction-db option ice: add ref-sync dpll pins