WARNING: line length of 86 exceeds 80 columns #114: FILE: drivers/net/phy/mxl-86110.c:28: +#define MXL86110_EXT_SYNCE_CFG_REG 0xA012 WARNING: line length of 99 exceeds 80 columns #123: FILE: drivers/net/phy/mxl-86110.c:37: +#define MXL86110_WOL_MAC_ADDR_HIGH_EXTD_REG 0xA007 /* high-> FF:FF */ WARNING: line length of 91 exceeds 80 columns #124: FILE: drivers/net/phy/mxl-86110.c:38: +#define MXL86110_WOL_MAC_ADDR_MIDDLE_EXTD_REG 0xA008 /* middle-> :FF:FF <-middle */ WARNING: line length of 99 exceeds 80 columns #125: FILE: drivers/net/phy/mxl-86110.c:39: +#define MXL86110_WOL_MAC_ADDR_LOW_EXTD_REG 0xA009 /* :FF:FF <-low */ WARNING: line length of 94 exceeds 80 columns #133: FILE: drivers/net/phy/mxl-86110.c:47: +#define MXL86110_EXT_RGMII_CFG1_REG 0xA003 WARNING: line length of 83 exceeds 80 columns #135: FILE: drivers/net/phy/mxl-86110.c:49: +#define MXL86110_EXT_RGMII_CFG1_RX_NO_DELAY (0x0 << 10) WARNING: line length of 83 exceeds 80 columns #137: FILE: drivers/net/phy/mxl-86110.c:51: +#define MXL86110_EXT_RGMII_CFG1_RX_DELAY_1950PS (0xD << 10) WARNING: line length of 87 exceeds 80 columns #138: FILE: drivers/net/phy/mxl-86110.c:52: +#define MXL86110_EXT_RGMII_CFG1_RX_DELAY_MASK GENMASK(13, 10) WARNING: line length of 82 exceeds 80 columns #140: FILE: drivers/net/phy/mxl-86110.c:54: +#define MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_1950PS (0xD << 0) WARNING: line length of 85 exceeds 80 columns #141: FILE: drivers/net/phy/mxl-86110.c:55: +#define MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_MASK GENMASK(3, 0) WARNING: line length of 82 exceeds 80 columns #143: FILE: drivers/net/phy/mxl-86110.c:57: +#define MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_1950PS (0xD << 4) WARNING: line length of 95 exceeds 80 columns #171: FILE: drivers/net/phy/mxl-86110.c:85: +#define MXL86110_LEDX_CFG_LINK_UP_TX_ACT_ON BIT(10) /* LED 0,1,2 default */ WARNING: line length of 95 exceeds 80 columns #172: FILE: drivers/net/phy/mxl-86110.c:86: +#define MXL86110_LEDX_CFG_LINK_UP_RX_ACT_ON BIT(9) /* LED 0,1,2 default */ WARNING: line length of 90 exceeds 80 columns #175: FILE: drivers/net/phy/mxl-86110.c:89: +#define MXL86110_LEDX_CFG_LINK_UP_1GB_ON BIT(6) /* LED 2 default */ WARNING: line length of 90 exceeds 80 columns #176: FILE: drivers/net/phy/mxl-86110.c:90: +#define MXL86110_LEDX_CFG_LINK_UP_100MB_ON BIT(5) /* LED 1 default */ WARNING: line length of 90 exceeds 80 columns #177: FILE: drivers/net/phy/mxl-86110.c:91: +#define MXL86110_LEDX_CFG_LINK_UP_10MB_ON BIT(4) /* LED 0 default */ WARNING: line length of 86 exceeds 80 columns #183: FILE: drivers/net/phy/mxl-86110.c:97: +#define MXL86110_LED_BLINK_CFG_REG 0xA00F WARNING: line length of 81 exceeds 80 columns #187: FILE: drivers/net/phy/mxl-86110.c:101: +#define MXL86110_LED_BLINK_CFG_FREQ_MODE1_16HZ (BIT(1) | BIT(0)) WARNING: line length of 81 exceeds 80 columns #191: FILE: drivers/net/phy/mxl-86110.c:105: +#define MXL86110_LED_BLINK_CFG_FREQ_MODE2_16HZ (BIT(3) | BIT(2)) WARNING: line length of 82 exceeds 80 columns #199: FILE: drivers/net/phy/mxl-86110.c:113: +#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_17_PERC_ON (BIT(6) | BIT(5) | BIT(4)) WARNING: line length of 86 exceeds 80 columns #219: FILE: drivers/net/phy/mxl-86110.c:133: +static int mxl86110_write_extended_reg(struct phy_device *phydev, u16 regnum, u16 val) WARNING: line length of 84 exceeds 80 columns #248: FILE: drivers/net/phy/mxl-86110.c:162: +static int mxl86110_locked_write_extended_reg(struct phy_device *phydev, u16 regnum, WARNING: line length of 86 exceeds 80 columns #299: FILE: drivers/net/phy/mxl-86110.c:213: + * Return: The 16-bit value read from the extended register, or a negative errno code. WARNING: line length of 83 exceeds 80 columns #301: FILE: drivers/net/phy/mxl-86110.c:215: +static int mxl86110_locked_read_extended_reg(struct phy_device *phydev, u16 regnum) WARNING: line length of 88 exceeds 80 columns #325: FILE: drivers/net/phy/mxl-86110.c:239: +static int mxl86110_modify_extended_reg(struct phy_device *phydev, u16 regnum, u16 mask, WARNING: line length of 84 exceeds 80 columns #342: FILE: drivers/net/phy/mxl-86110.c:256: +static void mxl86110_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) WARNING: line length of 84 exceeds 80 columns #348: FILE: drivers/net/phy/mxl-86110.c:262: + value = mxl86110_locked_read_extended_reg(phydev, MXL86110_EXT_WOL_CFG_REG); WARNING: line length of 83 exceeds 80 columns #361: FILE: drivers/net/phy/mxl-86110.c:275: +static int mxl86110_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) WARNING: line length of 94 exceeds 80 columns #374: FILE: drivers/net/phy/mxl-86110.c:288: + ret = mxl86110_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_HIGH_EXTD_REG, WARNING: line length of 96 exceeds 80 columns #379: FILE: drivers/net/phy/mxl-86110.c:293: + ret = mxl86110_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_MIDDLE_EXTD_REG, WARNING: line length of 93 exceeds 80 columns #384: FILE: drivers/net/phy/mxl-86110.c:298: + ret = mxl86110_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_LOW_EXTD_REG, WARNING: line length of 84 exceeds 80 columns #389: FILE: drivers/net/phy/mxl-86110.c:303: + ret = mxl86110_modify_extended_reg(phydev, MXL86110_EXT_WOL_CFG_REG, WARNING: line length of 82 exceeds 80 columns #390: FILE: drivers/net/phy/mxl-86110.c:304: + MXL86110_EXT_WOL_CFG_WOLE_MASK, WARNING: line length of 85 exceeds 80 columns #391: FILE: drivers/net/phy/mxl-86110.c:305: + MXL86110_EXT_WOL_CFG_WOLE_ENABLE); WARNING: line length of 85 exceeds 80 columns #401: FILE: drivers/net/phy/mxl-86110.c:315: + __func__, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); WARNING: line length of 84 exceeds 80 columns #404: FILE: drivers/net/phy/mxl-86110.c:318: + ret = mxl86110_modify_extended_reg(phydev, MXL86110_EXT_WOL_CFG_REG, WARNING: line length of 82 exceeds 80 columns #405: FILE: drivers/net/phy/mxl-86110.c:319: + MXL86110_EXT_WOL_CFG_WOLE_MASK, WARNING: line length of 86 exceeds 80 columns #406: FILE: drivers/net/phy/mxl-86110.c:320: + MXL86110_EXT_WOL_CFG_WOLE_DISABLE); WARNING: line length of 82 exceeds 80 columns #420: FILE: drivers/net/phy/mxl-86110.c:334: + BIT(TRIGGER_NETDEV_HALF_DUPLEX) | WARNING: line length of 82 exceeds 80 columns #421: FILE: drivers/net/phy/mxl-86110.c:335: + BIT(TRIGGER_NETDEV_FULL_DUPLEX) | WARNING: line length of 93 exceeds 80 columns #508: FILE: drivers/net/phy/mxl-86110.c:422: + ret = mxl86110_locked_write_extended_reg(phydev, MXL86110_LED0_CFG_REG + index, val); WARNING: line length of 83 exceeds 80 columns #528: FILE: drivers/net/phy/mxl-86110.c:442: + * Configures the clock output to its default setting as per the datasheet. WARNING: line length of 83 exceeds 80 columns #583: FILE: drivers/net/phy/mxl-86110.c:497: + MXL86110_EXT_RGMII_CFG1_FULL_MASK, val); WARNING: line length of 83 exceeds 80 columns #587: FILE: drivers/net/phy/mxl-86110.c:501: + /* Configure RXDLY (RGMII Rx Clock Delay) to disable the default additional WARNING: line length of 82 exceeds 80 columns #592: FILE: drivers/net/phy/mxl-86110.c:506: + MXL86110_EXT_CHIP_CFG_RXDLY_ENABLE, 0); WARNING: line length of 82 exceeds 80 columns #597: FILE: drivers/net/phy/mxl-86110.c:511: + * Configure all PHY LEDs to blink on traffic activity regardless of their WARNING: line length of 85 exceeds 80 columns #598: FILE: drivers/net/phy/mxl-86110.c:512: + * ON or OFF state. This behavior allows each LED to serve as a pure activity WARNING: line length of 90 exceeds 80 columns #601: FILE: drivers/net/phy/mxl-86110.c:515: + * By default, each LED blinks only when it is also in the ON state. This function WARNING: line length of 83 exceeds 80 columns #602: FILE: drivers/net/phy/mxl-86110.c:516: + * modifies the appropriate registers (LABx fields) to enable blinking even WARNING: line length of 84 exceeds 80 columns #603: FILE: drivers/net/phy/mxl-86110.c:517: + * when the LEDs are OFF, to allow the LED to be used as a traffic indicator WARNING: line length of 95 exceeds 80 columns #607: FILE: drivers/net/phy/mxl-86110.c:521: + * /sys/class/led interface; the functions led_hw_is_supported, led_hw_control_get, and WARNING: line length of 88 exceeds 80 columns #611: FILE: drivers/net/phy/mxl-86110.c:525: + val = mxl86110_read_extended_reg(phydev, MXL86110_LED0_CFG_REG + index); WARNING: line length of 94 exceeds 80 columns #616: FILE: drivers/net/phy/mxl-86110.c:530: + ret = mxl86110_write_extended_reg(phydev, MXL86110_LED0_CFG_REG + index, val); WARNING: line length of 84 exceeds 80 columns #623: FILE: drivers/net/phy/mxl-86110.c:537: + * Currently, broadcast mode is explicitly disabled by clearing the EPA0 bit WARNING: line length of 84 exceeds 80 columns #631: FILE: drivers/net/phy/mxl-86110.c:545: + ret = mxl86110_write_extended_reg(phydev, MXL86110_EXT_RGMII_MDIO_CFG, val); total: 0 errors, 55 warnings, 0 checks, 631 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. Commit af4c4ed510bb ("net: phy: add driver for MaxLinear MxL86110 PHY") has style problems, please review. NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 55 warnings, 0 checks, 631 lines checked