WARNING: line length of 86 exceeds 80 columns #140: FILE: drivers/net/phy/mxl-8611x.c:40: +#define MXL8611X_EXT_SYNCE_CFG_REG 0xA012 WARNING: line length of 99 exceeds 80 columns #149: FILE: drivers/net/phy/mxl-8611x.c:49: +#define MXL86110_WOL_MAC_ADDR_HIGH_EXTD_REG 0xA007 /* high-> FF:FF */ WARNING: line length of 91 exceeds 80 columns #150: FILE: drivers/net/phy/mxl-8611x.c:50: +#define MXL86110_WOL_MAC_ADDR_MIDDLE_EXTD_REG 0xA008 /* middle-> :FF:FF <-middle */ WARNING: line length of 99 exceeds 80 columns #151: FILE: drivers/net/phy/mxl-8611x.c:51: +#define MXL86110_WOL_MAC_ADDR_LOW_EXTD_REG 0xA009 /* :FF:FF <-low */ WARNING: line length of 94 exceeds 80 columns #159: FILE: drivers/net/phy/mxl-8611x.c:59: +#define MXL8611X_EXT_RGMII_CFG1_REG 0xA003 WARNING: line length of 81 exceeds 80 columns #161: FILE: drivers/net/phy/mxl-8611x.c:61: +#define MXL8611X_EXT_RGMII_CFG1_NO_DELAY 0 WARNING: line length of 83 exceeds 80 columns #162: FILE: drivers/net/phy/mxl-8611x.c:62: +#define MXL8611X_EXT_RGMII_CFG1_RX_DELAY_MAX (0xF << 10) WARNING: line length of 83 exceeds 80 columns #163: FILE: drivers/net/phy/mxl-8611x.c:63: +#define MXL8611X_EXT_RGMII_CFG1_RX_DELAY_MIN (0x1 << 10) WARNING: line length of 87 exceeds 80 columns #168: FILE: drivers/net/phy/mxl-8611x.c:68: +#define MXL8611X_EXT_RGMII_CFG1_RX_DELAY_MASK GENMASK(13, 10) WARNING: line length of 82 exceeds 80 columns #169: FILE: drivers/net/phy/mxl-8611x.c:69: +#define MXL8611X_EXT_RGMII_CFG1_TX_1G_DELAY_MAX (0xF << 0) WARNING: line length of 82 exceeds 80 columns #170: FILE: drivers/net/phy/mxl-8611x.c:70: +#define MXL8611X_EXT_RGMII_CFG1_TX_1G_DELAY_MIN (0x1 << 0) WARNING: line length of 85 exceeds 80 columns #171: FILE: drivers/net/phy/mxl-8611x.c:71: +#define MXL8611X_EXT_RGMII_CFG1_TX_1G_DELAY_MASK GENMASK(3, 0) WARNING: line length of 95 exceeds 80 columns #208: FILE: drivers/net/phy/mxl-8611x.c:108: +#define MXL8611X_LEDX_CFG_LINK_UP_TX_ACT_ON BIT(10) /* LED 0,1,2 default */ WARNING: line length of 95 exceeds 80 columns #209: FILE: drivers/net/phy/mxl-8611x.c:109: +#define MXL8611X_LEDX_CFG_LINK_UP_RX_ACT_ON BIT(9) /* LED 0,1,2 default */ WARNING: line length of 90 exceeds 80 columns #212: FILE: drivers/net/phy/mxl-8611x.c:112: +#define MXL8611X_LEDX_CFG_LINK_UP_1GB_ON BIT(6) /* LED 2 default */ WARNING: line length of 90 exceeds 80 columns #213: FILE: drivers/net/phy/mxl-8611x.c:113: +#define MXL8611X_LEDX_CFG_LINK_UP_100MB_ON BIT(5) /* LED 1 default */ WARNING: line length of 90 exceeds 80 columns #214: FILE: drivers/net/phy/mxl-8611x.c:114: +#define MXL8611X_LEDX_CFG_LINK_UP_10MB_ON BIT(4) /* LED 0 default */ WARNING: line length of 86 exceeds 80 columns #220: FILE: drivers/net/phy/mxl-8611x.c:120: +#define MXL8611X_LED_BLINK_CFG_REG 0xA00F WARNING: line length of 81 exceeds 80 columns #224: FILE: drivers/net/phy/mxl-8611x.c:124: +#define MXL8611X_LED_BLINK_CFG_FREQ_MODE1_16HZ (BIT(1) | BIT(0)) WARNING: line length of 81 exceeds 80 columns #228: FILE: drivers/net/phy/mxl-8611x.c:128: +#define MXL8611X_LED_BLINK_CFG_FREQ_MODE2_16HZ (BIT(3) | BIT(2)) WARNING: line length of 82 exceeds 80 columns #236: FILE: drivers/net/phy/mxl-8611x.c:136: +#define MXL8611X_LED_BLINK_CFG_DUTY_CYCLE_17_PERC_ON (BIT(6) | BIT(5) | BIT(4)) WARNING: line length of 85 exceeds 80 columns #263: FILE: drivers/net/phy/mxl-8611x.c:163: +#define MXL86111_EXT_CHIP_CFG_MODE_SEL_MASK GENMASK(2, 0) WARNING: line length of 84 exceeds 80 columns #325: FILE: drivers/net/phy/mxl-8611x.c:225: +static int mxlphy_write_extended_reg(struct phy_device *phydev, u16 regnum, u16 val) WARNING: line length of 82 exceeds 80 columns #344: FILE: drivers/net/phy/mxl-8611x.c:244: +static int mxlphy_locked_write_extended_reg(struct phy_device *phydev, u16 regnum, WARNING: line length of 81 exceeds 80 columns #384: FILE: drivers/net/phy/mxl-8611x.c:284: +static int mxlphy_locked_read_extended_reg(struct phy_device *phydev, u16 regnum) WARNING: line length of 86 exceeds 80 columns #407: FILE: drivers/net/phy/mxl-8611x.c:307: +static int mxlphy_modify_extended_reg(struct phy_device *phydev, u16 regnum, u16 mask, WARNING: line length of 81 exceeds 80 columns #420: FILE: drivers/net/phy/mxl-8611x.c:320: + * mxlphy_locked_modify_extended_reg() - modify bits of a PHY's extended register WARNING: line length of 83 exceeds 80 columns #430: FILE: drivers/net/phy/mxl-8611x.c:330: +static int mxlphy_locked_modify_extended_reg(struct phy_device *phydev, u16 regnum, WARNING: line length of 82 exceeds 80 columns #447: FILE: drivers/net/phy/mxl-8611x.c:347: +static void mxlphy_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) WARNING: line length of 82 exceeds 80 columns #453: FILE: drivers/net/phy/mxl-8611x.c:353: + value = mxlphy_locked_read_extended_reg(phydev, MXL8611X_EXT_WOL_CFG_REG); WARNING: line length of 81 exceeds 80 columns #466: FILE: drivers/net/phy/mxl-8611x.c:366: +static int mxlphy_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol) WARNING: line length of 81 exceeds 80 columns #478: FILE: drivers/net/phy/mxl-8611x.c:378: + page_to_restore = phy_select_page(phydev, MXL86110_DEFAULT_PAGE); WARNING: line length of 92 exceeds 80 columns #484: FILE: drivers/net/phy/mxl-8611x.c:384: + ret = mxlphy_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_HIGH_EXTD_REG, WARNING: line length of 94 exceeds 80 columns #488: FILE: drivers/net/phy/mxl-8611x.c:388: + ret = mxlphy_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_MIDDLE_EXTD_REG, WARNING: line length of 91 exceeds 80 columns #492: FILE: drivers/net/phy/mxl-8611x.c:392: + ret = mxlphy_write_extended_reg(phydev, MXL86110_WOL_MAC_ADDR_LOW_EXTD_REG, WARNING: line length of 82 exceeds 80 columns #497: FILE: drivers/net/phy/mxl-8611x.c:397: + ret = mxlphy_modify_extended_reg(phydev, MXL8611X_EXT_WOL_CFG_REG, WARNING: line length of 83 exceeds 80 columns #499: FILE: drivers/net/phy/mxl-8611x.c:399: + MXL8611X_EXT_WOL_CFG_WOLE_ENABLE); WARNING: line length of 85 exceeds 80 columns #509: FILE: drivers/net/phy/mxl-8611x.c:409: + __func__, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); WARNING: line length of 81 exceeds 80 columns #512: FILE: drivers/net/phy/mxl-8611x.c:412: + page_to_restore = phy_select_page(phydev, MXL86110_DEFAULT_PAGE); WARNING: line length of 82 exceeds 80 columns #516: FILE: drivers/net/phy/mxl-8611x.c:416: + ret = mxlphy_modify_extended_reg(phydev, MXL8611X_EXT_WOL_CFG_REG, WARNING: line length of 84 exceeds 80 columns #518: FILE: drivers/net/phy/mxl-8611x.c:418: + MXL8611X_EXT_WOL_CFG_WOLE_DISABLE); WARNING: line length of 82 exceeds 80 columns #538: FILE: drivers/net/phy/mxl-8611x.c:438: + * By default, each LED blinks only when it is also in the ON state. This function WARNING: line length of 87 exceeds 80 columns #544: FILE: drivers/net/phy/mxl-8611x.c:444: + * /sys/class/led interface; the functions led_hw_is_supported, led_hw_control_get, and WARNING: line length of 86 exceeds 80 columns #555: FILE: drivers/net/phy/mxl-8611x.c:455: + val = mxlphy_read_extended_reg(phydev, MXL8611X_LED0_CFG_REG + index); WARNING: line length of 92 exceeds 80 columns #561: FILE: drivers/net/phy/mxl-8611x.c:461: + ret = mxlphy_write_extended_reg(phydev, MXL8611X_LED0_CFG_REG + index, val); WARNING: line length of 82 exceeds 80 columns #572: FILE: drivers/net/phy/mxl-8611x.c:472: + BIT(TRIGGER_NETDEV_HALF_DUPLEX) | WARNING: line length of 82 exceeds 80 columns #573: FILE: drivers/net/phy/mxl-8611x.c:473: + BIT(TRIGGER_NETDEV_FULL_DUPLEX) | WARNING: line length of 91 exceeds 80 columns #660: FILE: drivers/net/phy/mxl-8611x.c:560: + ret = mxlphy_locked_write_extended_reg(phydev, MXL8611X_LED0_CFG_REG + index, val); WARNING: line length of 87 exceeds 80 columns #673: FILE: drivers/net/phy/mxl-8611x.c:573: + * address 0 on the MDIO bus. This feature enables PHY to always respond to MDIO access WARNING: line length of 82 exceeds 80 columns #700: FILE: drivers/net/phy/mxl-8611x.c:600: + ret = mxlphy_write_extended_reg(phydev, MXL8611X_EXT_RGMII_MDIO_CFG, val); WARNING: line length of 83 exceeds 80 columns #723: FILE: drivers/net/phy/mxl-8611x.c:623: + * Configures the clock output to its default setting as per the datasheet. WARNING: line length of 83 exceeds 80 columns #735: FILE: drivers/net/phy/mxl-8611x.c:635: + ret = mxlphy_locked_modify_extended_reg(phydev, MXL8611X_EXT_SYNCE_CFG_REG, WARNING: line length of 81 exceeds 80 columns #774: FILE: drivers/net/phy/mxl-8611x.c:674: + MXL8611X_EXT_RGMII_CFG1_FULL_MASK, val); WARNING: line length of 93 exceeds 80 columns #799: FILE: drivers/net/phy/mxl-8611x.c:699: + /* dual_media_advertising used for Dual Media mode (MXL86111_EXT_SMI_SDS_PHY_AUTO) */ WARNING: line length of 89 exceeds 80 columns #824: FILE: drivers/net/phy/mxl-8611x.c:724: + old_page = mxlphy_locked_read_extended_reg(phydev, MXL86111_EXT_SMI_SDS_PHY_REG); WARNING: line length of 99 exceeds 80 columns #828: FILE: drivers/net/phy/mxl-8611x.c:728: + if ((old_page & MXL86111_EXT_SMI_SDS_PHYSPACE_MASK) == MXL86111_EXT_SMI_SDS_PHYFIBER_SPACE) WARNING: line length of 95 exceeds 80 columns #847: FILE: drivers/net/phy/mxl-8611x.c:747: + if ((page & MXL86111_EXT_SMI_SDS_PHYSPACE_MASK) == MXL86111_EXT_SMI_SDS_PHYFIBER_SPACE) WARNING: line length of 91 exceeds 80 columns #852: FILE: drivers/net/phy/mxl-8611x.c:752: + return mxlphy_modify_extended_reg(phydev, MXL86111_EXT_SMI_SDS_PHY_REG, mask, set); WARNING: line length of 86 exceeds 80 columns #856: FILE: drivers/net/phy/mxl-8611x.c:756: + * mxl86111_modify_bmcr_paged - modify bits of the PHY's BMCR register of a given page WARNING: line length of 93 exceeds 80 columns #876: FILE: drivers/net/phy/mxl-8611x.c:776: + page_to_restore = phy_select_page(phydev, page & MXL86111_EXT_SMI_SDS_PHYSPACE_MASK); WARNING: line length of 84 exceeds 80 columns #893: FILE: drivers/net/phy/mxl-8611x.c:793: + return phy_restore_page(phydev, page_to_restore, 0); WARNING: line length of 92 exceeds 80 columns #895: FILE: drivers/net/phy/mxl-8611x.c:795: + phydev_warn(phydev, "%s, BMCR reset not completed until timeout", __func__); WARNING: line length of 84 exceeds 80 columns #921: FILE: drivers/net/phy/mxl-8611x.c:821: + ret = mxl86111_modify_bmcr_paged(phydev, priv->reg_page, mask, set); WARNING: line length of 85 exceeds 80 columns #1050: FILE: drivers/net/phy/mxl-8611x.c:950: + * mxl86111_get_features - select the reg space then call mxl86111_get_features_paged WARNING: line length of 82 exceeds 80 columns #1118: FILE: drivers/net/phy/mxl-8611x.c:1018: + ret = mxlphy_locked_modify_extended_reg(phydev, MXL86111_EXT_CHIP_CFG_REG, WARNING: line length of 84 exceeds 80 columns #1119: FILE: drivers/net/phy/mxl-8611x.c:1019: + MXL86111_EXT_CHIP_CFG_MODE_SEL_MASK, WARNING: line length of 89 exceeds 80 columns #1120: FILE: drivers/net/phy/mxl-8611x.c:1020: + MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_RGMII); WARNING: line length of 82 exceeds 80 columns #1124: FILE: drivers/net/phy/mxl-8611x.c:1024: + ret = mxlphy_locked_modify_extended_reg(phydev, MXL86111_EXT_CHIP_CFG_REG, WARNING: line length of 88 exceeds 80 columns #1125: FILE: drivers/net/phy/mxl-8611x.c:1025: + MXL86111_EXT_CHIP_CFG_SW_RST_N_MODE, 0); WARNING: line length of 89 exceeds 80 columns #1129: FILE: drivers/net/phy/mxl-8611x.c:1029: + chip_config = mxlphy_locked_read_extended_reg(phydev, MXL86111_EXT_CHIP_CFG_REG); WARNING: line length of 84 exceeds 80 columns #1159: FILE: drivers/net/phy/mxl-8611x.c:1059: + MXL86111_EXT_SMI_SDS_PHY_REG, WARNING: line length of 82 exceeds 80 columns #1165: FILE: drivers/net/phy/mxl-8611x.c:1065: + phydev_dbg(phydev, "%s, pinstrap mode: %d\n", __func__, priv->strap_mode); WARNING: line length of 84 exceeds 80 columns #1167: FILE: drivers/net/phy/mxl-8611x.c:1067: + /* configure syncE / clk output - can be defined in custom config section */ WARNING: line length of 81 exceeds 80 columns #1186: FILE: drivers/net/phy/mxl-8611x.c:1086: +static int mxlphy_check_and_restart_aneg(struct phy_device *phydev, bool restart) WARNING: line length of 87 exceeds 80 columns #1195: FILE: drivers/net/phy/mxl-8611x.c:1095: + /* Advertisement did not change, but aneg maybe was never to begin with WARNING: line length of 84 exceeds 80 columns #1329: FILE: drivers/net/phy/mxl-8611x.c:1229: + /* identical to genphy_setup_master_slave, but phy_read without mdio lock */ WARNING: line length of 94 exceeds 80 columns #1337: FILE: drivers/net/phy/mxl-8611x.c:1237: + /* configures/forces speed/duplex, empty rate selection would result in 10M */ WARNING: line length of 88 exceeds 80 columns #1355: FILE: drivers/net/phy/mxl-8611x.c:1255: + /* At least one valid rate must be advertised in Dual Media mode, since it could WARNING: line length of 90 exceeds 80 columns #1356: FILE: drivers/net/phy/mxl-8611x.c:1256: + * lead to permanent blocking of the UTP path otherwise. The PHY HW is controlling WARNING: line length of 89 exceeds 80 columns #1358: FILE: drivers/net/phy/mxl-8611x.c:1258: + * If mode switches to Fiber reg page when a link partner is connected, while UTP WARNING: line length of 90 exceeds 80 columns #1359: FILE: drivers/net/phy/mxl-8611x.c:1259: + * link is down, it can never switch back to UTP if the link cannot be established WARNING: line length of 90 exceeds 80 columns #1360: FILE: drivers/net/phy/mxl-8611x.c:1260: + * anymore due to invalid configuration. A HW reset would be required to re-enable WARNING: line length of 93 exceeds 80 columns #1361: FILE: drivers/net/phy/mxl-8611x.c:1261: + * UTP mode. Therefore prevent this situation and ignore invalid speed configuration. WARNING: line length of 91 exceeds 80 columns #1362: FILE: drivers/net/phy/mxl-8611x.c:1262: + * Returning a negative return code (e.g. EINVAL) results in stack trace dumps from WARNING: line length of 95 exceeds 80 columns #1367: FILE: drivers/net/phy/mxl-8611x.c:1267: + if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, phydev->advertising)) WARNING: line length of 95 exceeds 80 columns #1369: FILE: drivers/net/phy/mxl-8611x.c:1269: + if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, phydev->advertising)) WARNING: line length of 96 exceeds 80 columns #1371: FILE: drivers/net/phy/mxl-8611x.c:1271: + if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, phydev->advertising)) WARNING: line length of 96 exceeds 80 columns #1373: FILE: drivers/net/phy/mxl-8611x.c:1273: + if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, phydev->advertising)) WARNING: line length of 97 exceeds 80 columns #1375: FILE: drivers/net/phy/mxl-8611x.c:1275: + if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, phydev->advertising)) WARNING: line length of 87 exceeds 80 columns #1421: FILE: drivers/net/phy/mxl-8611x.c:1321: + MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL, val); WARNING: line length of 87 exceeds 80 columns #1425: FILE: drivers/net/phy/mxl-8611x.c:1325: + ret = mxlphy_modify_extended_reg(phydev, MXL86111_EXT_SDS_LINK_TIMER_CFG2_REG, WARNING: line length of 90 exceeds 80 columns #1426: FILE: drivers/net/phy/mxl-8611x.c:1326: + MXL86111_EXT_SDS_LINK_TIMER_CFG2_EN_AUTOSEN, 0); WARNING: line length of 82 exceeds 80 columns #1431: FILE: drivers/net/phy/mxl-8611x.c:1331: + MXL86111_EXT_CHIP_CFG_SW_RST_N_MODE, 0); WARNING: line length of 87 exceeds 80 columns #1453: FILE: drivers/net/phy/mxl-8611x.c:1353: + ret = mxlphy_modify_extended_reg(phydev, MXL86111_EXT_SDS_LINK_TIMER_CFG2_REG, WARNING: line length of 90 exceeds 80 columns #1454: FILE: drivers/net/phy/mxl-8611x.c:1354: + 0, MXL86111_EXT_SDS_LINK_TIMER_CFG2_EN_AUTOSEN); WARNING: line length of 82 exceeds 80 columns #1459: FILE: drivers/net/phy/mxl-8611x.c:1359: + MXL86111_EXT_CHIP_CFG_SW_RST_N_MODE, 0); WARNING: line length of 88 exceeds 80 columns #1489: FILE: drivers/net/phy/mxl-8611x.c:1389: + /* identical to genphy_check_and_restart_aneg, but phy_read without mdio lock */ WARNING: line length of 84 exceeds 80 columns #1529: FILE: drivers/net/phy/mxl-8611x.c:1429: + priv->dual_media_advertising, fiber_supported); WARNING: line length of 84 exceeds 80 columns #1531: FILE: drivers/net/phy/mxl-8611x.c:1431: + /* ETHTOOL_LINK_MODE_Autoneg_BIT is also used in UTP mode */ WARNING: line length of 81 exceeds 80 columns #1563: FILE: drivers/net/phy/mxl-8611x.c:1463: + * mxl86111_config_aneg() - set reg page and then call mxl86111_config_aneg_paged WARNING: line length of 91 exceeds 80 columns #1579: FILE: drivers/net/phy/mxl-8611x.c:1479: + * phydev->advertising need to be saved at first run, since it contains the WARNING: line length of 87 exceeds 80 columns #1580: FILE: drivers/net/phy/mxl-8611x.c:1480: + * advertising which supported by both mac and mxl86111(utp and fiber). WARNING: line length of 81 exceeds 80 columns #1599: FILE: drivers/net/phy/mxl-8611x.c:1499: + linkmode_copy(phydev->advertising, priv->dual_media_advertising); WARNING: line length of 87 exceeds 80 columns #1605: FILE: drivers/net/phy/mxl-8611x.c:1505: + * mxl86111_aneg_done_paged() - determines the auto negotiation result of a given page. WARNING: line length of 93 exceeds 80 columns #1618: FILE: drivers/net/phy/mxl-8611x.c:1518: + page_to_restore = phy_select_page(phydev, page & MXL86111_EXT_SMI_SDS_PHYSPACE_MASK); WARNING: line length of 85 exceeds 80 columns #1672: FILE: drivers/net/phy/mxl-8611x.c:1572: + page_to_restore = phy_select_page(phydev, MXL86111_EXT_SMI_SDS_PHYUTP_SPACE); WARNING: line length of 85 exceeds 80 columns #1696: FILE: drivers/net/phy/mxl-8611x.c:1596: + ret = mxlphy_modify_extended_reg(phydev, MXL8611X_EXT_RGMII_CFG1_REG, WARNING: line length of 89 exceeds 80 columns #1697: FILE: drivers/net/phy/mxl-8611x.c:1597: + MXL8611X_EXT_RGMII_CFG1_FULL_MASK, val); WARNING: line length of 84 exceeds 80 columns #1702: FILE: drivers/net/phy/mxl-8611x.c:1602: + * delay value on RX_CLK (2 ns for 125 MHz, 8 ns for 25 MHz/2.5 MHz) WARNING: line length of 83 exceeds 80 columns #1704: FILE: drivers/net/phy/mxl-8611x.c:1604: + ret = mxlphy_modify_extended_reg(phydev, MXL86111_EXT_CHIP_CFG_REG, WARNING: line length of 88 exceeds 80 columns #1705: FILE: drivers/net/phy/mxl-8611x.c:1605: + MXL86111_EXT_CHIP_CFG_RXDLY_ENABLE, 1); WARNING: line length of 81 exceeds 80 columns #1784: FILE: drivers/net/phy/mxl-8611x.c:1684: + * @is_utp: false(mxl86111 work in fiber mode) or true(mxl86111 work in utp mode) WARNING: line length of 85 exceeds 80 columns #1790: FILE: drivers/net/phy/mxl-8611x.c:1690: +static int mxl86111_adjust_status(struct phy_device *phydev, int status, bool is_utp) WARNING: line length of 90 exceeds 80 columns #1798: FILE: drivers/net/phy/mxl-8611x.c:1698: + duplex = (status & MXL86111_PHY_STAT_DPX) >> MXL86111_PHY_STAT_DPX_OFFSET; WARNING: line length of 94 exceeds 80 columns #1978: FILE: drivers/net/phy/mxl-8611x.c:1878: + phydev->port = (page == MXL86111_EXT_SMI_SDS_PHYFIBER_SPACE) ? WARNING: line length of 89 exceeds 80 columns #1981: FILE: drivers/net/phy/mxl-8611x.c:1881: + phydev_info(phydev, "%s, link up, media: %s\n", __func__, WARNING: line length of 89 exceeds 80 columns #1982: FILE: drivers/net/phy/mxl-8611x.c:1882: + (phydev->port == PORT_TP) ? "UTP" : "Fiber"); WARNING: line length of 93 exceeds 80 columns #1987: FILE: drivers/net/phy/mxl-8611x.c:1887: + /* PHY HW detected UTP port active in parallel to FIBER port. WARNING: line length of 100 exceeds 80 columns #1988: FILE: drivers/net/phy/mxl-8611x.c:1888: + * Since UTP has priority, the page will be hard switched from FIBER WARNING: line length of 100 exceeds 80 columns #1989: FILE: drivers/net/phy/mxl-8611x.c:1889: + * to UTP. This needs to be detected and FIBER link reported as down WARNING: line length of 99 exceeds 80 columns #1992: FILE: drivers/net/phy/mxl-8611x.c:1892: + __func__, (phydev->port == PORT_TP) ? "UTP" : "Fiber"); WARNING: line length of 87 exceeds 80 columns #1999: FILE: drivers/net/phy/mxl-8611x.c:1899: + priv->reg_page = MXL86111_EXT_SMI_SDS_PHY_AUTO; WARNING: line length of 91 exceeds 80 columns #2008: FILE: drivers/net/phy/mxl-8611x.c:1908: + __func__, (phydev->port == PORT_TP) ? "UTP" : "Fiber"); WARNING: line length of 87 exceeds 80 columns #2010: FILE: drivers/net/phy/mxl-8611x.c:1910: + /* When in MXL86111_MODE_AUTO mode, arbitration will be prepare WARNING: line length of 87 exceeds 80 columns #2047: FILE: drivers/net/phy/mxl-8611x.c:1947: + wol_config = mxlphy_locked_read_extended_reg(phydev, MXL8611X_EXT_WOL_CFG_REG); WARNING: line length of 90 exceeds 80 columns #2056: FILE: drivers/net/phy/mxl-8611x.c:1956: + * and the mode might not 'wake up' anymore later on when the other mode is active WARNING: line length of 87 exceeds 80 columns #2074: FILE: drivers/net/phy/mxl-8611x.c:1974: + wol_config = mxlphy_locked_read_extended_reg(phydev, MXL8611X_EXT_WOL_CFG_REG); total: 0 errors, 127 warnings, 0 checks, 2068 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. Commit 9a7f3e23b1b8 ("net: phy: mxl-8611: add support for MaxLinear MxL86110/MxL86111 PHY") has style problems, please review. NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 127 warnings, 0 checks, 2068 lines checked