diff --git a/home/nipa/nipa_out/953676/ynl/old-code/dpll-user.c b/home/nipa/nipa_out/953676/ynl/new-code/dpll-user.c index cdc58aad33e4..ffdce9b65f39 100644 --- a/home/nipa/nipa_out/953676/ynl/old-code/dpll-user.c +++ b/home/nipa/nipa_out/953676/ynl/new-code/dpll-user.c @@ -192,6 +192,16 @@ const struct ynl_policy_nest dpll_pin_parent_pin_nest = { .table = dpll_pin_parent_pin_policy, }; +const struct ynl_policy_attr dpll_reference_sync_policy[DPLL_A_PIN_MAX + 1] = { + [DPLL_A_PIN_ID] = { .name = "id", .type = YNL_PT_U32, }, + [DPLL_A_PIN_STATE] = { .name = "state", .type = YNL_PT_U32, }, +}; + +const struct ynl_policy_nest dpll_reference_sync_nest = { + .max_attr = DPLL_A_PIN_MAX, + .table = dpll_reference_sync_policy, +}; + const struct ynl_policy_attr dpll_policy[DPLL_A_MAX + 1] = { [DPLL_A_ID] = { .name = "id", .type = YNL_PT_U32, }, [DPLL_A_MODULE_NAME] = { .name = "module-name", .type = YNL_PT_NUL_STR, }, @@ -239,6 +249,7 @@ const struct ynl_policy_attr dpll_pin_policy[DPLL_A_PIN_MAX + 1] = { [DPLL_A_PIN_ESYNC_FREQUENCY] = { .name = "esync-frequency", .type = YNL_PT_U64, }, [DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED] = { .name = "esync-frequency-supported", .type = YNL_PT_NEST, .nest = &dpll_frequency_range_nest, }, [DPLL_A_PIN_ESYNC_PULSE] = { .name = "esync-pulse", .type = YNL_PT_U32, }, + [DPLL_A_PIN_REFERENCE_SYNC] = { .name = "reference-sync", .type = YNL_PT_NEST, .nest = &dpll_reference_sync_nest, }, }; const struct ynl_policy_nest dpll_pin_nest = { @@ -385,6 +396,50 @@ int dpll_pin_parent_pin_parse(struct ynl_parse_arg *yarg, return 0; } +void dpll_reference_sync_free(struct dpll_reference_sync *obj) +{ +} + +int dpll_reference_sync_put(struct nlmsghdr *nlh, unsigned int attr_type, + struct dpll_reference_sync *obj) +{ + struct nlattr *nest; + + nest = ynl_attr_nest_start(nlh, attr_type); + if (obj->_present.id) + ynl_attr_put_u32(nlh, DPLL_A_PIN_ID, obj->id); + if (obj->_present.state) + ynl_attr_put_u32(nlh, DPLL_A_PIN_STATE, obj->state); + ynl_attr_nest_end(nlh, nest); + + return 0; +} + +int dpll_reference_sync_parse(struct ynl_parse_arg *yarg, + const struct nlattr *nested) +{ + struct dpll_reference_sync *dst = yarg->data; + const struct nlattr *attr; + + ynl_attr_for_each_nested(attr, nested) { + unsigned int type = ynl_attr_type(attr); + + if (type == DPLL_A_PIN_ID) { + if (ynl_attr_validate(yarg, attr)) + return YNL_PARSE_CB_ERROR; + dst->_present.id = 1; + dst->id = ynl_attr_get_u32(attr); + } else if (type == DPLL_A_PIN_STATE) { + if (ynl_attr_validate(yarg, attr)) + return YNL_PARSE_CB_ERROR; + dst->_present.state = 1; + dst->state = ynl_attr_get_u32(attr); + } + } + + return 0; +} + /* ============== DPLL_CMD_DEVICE_ID_GET ============== */ /* DPLL_CMD_DEVICE_ID_GET - do */ void dpll_device_id_get_req_free(struct dpll_device_id_get_req *req) @@ -762,6 +817,9 @@ void dpll_pin_get_rsp_free(struct dpll_pin_get_rsp *rsp) for (i = 0; i < rsp->n_esync_frequency_supported; i++) dpll_frequency_range_free(&rsp->esync_frequency_supported[i]); free(rsp->esync_frequency_supported); + for (i = 0; i < rsp->n_reference_sync; i++) + dpll_reference_sync_free(&rsp->reference_sync[i]); + free(rsp->reference_sync); free(rsp); } @@ -770,6 +828,7 @@ int dpll_pin_get_rsp_parse(const struct nlmsghdr *nlh, { unsigned int n_esync_frequency_supported = 0; unsigned int n_frequency_supported = 0; + unsigned int n_reference_sync = 0; unsigned int n_parent_device = 0; unsigned int n_parent_pin = 0; struct dpll_pin_get_rsp *dst; @@ -788,6 +847,8 @@ int dpll_pin_get_rsp_parse(const struct nlmsghdr *nlh, return ynl_error_parse(yarg, "attribute already present (pin.parent-device)"); if (dst->parent_pin) return ynl_error_parse(yarg, "attribute already present (pin.parent-pin)"); + if (dst->reference_sync) + return ynl_error_parse(yarg, "attribute already present (pin.reference-sync)"); ynl_attr_for_each(attr, nlh, yarg->ys->family->hdr_len) { unsigned int type = ynl_attr_type(attr); @@ -883,6 +944,8 @@ int dpll_pin_get_rsp_parse(const struct nlmsghdr *nlh, return YNL_PARSE_CB_ERROR; dst->_present.esync_pulse = 1; dst->esync_pulse = ynl_attr_get_u32(attr); + } else if (type == DPLL_A_PIN_REFERENCE_SYNC) { + n_reference_sync++; } } @@ -942,6 +1005,20 @@ int dpll_pin_get_rsp_parse(const struct nlmsghdr *nlh, } } } + if (n_reference_sync) { + dst->reference_sync = calloc(n_reference_sync, sizeof(*dst->reference_sync)); + dst->n_reference_sync = n_reference_sync; + i = 0; + parg.rsp_policy = &dpll_reference_sync_nest; + ynl_attr_for_each(attr, nlh, yarg->ys->family->hdr_len) { + if (ynl_attr_type(attr) == DPLL_A_PIN_REFERENCE_SYNC) { + parg.data = &dst->reference_sync[i]; + if (dpll_reference_sync_parse(&parg, attr)) + return YNL_PARSE_CB_ERROR; + i++; + } + } + } return YNL_PARSE_CB_OK; } @@ -1008,6 +1085,9 @@ void dpll_pin_get_list_free(struct dpll_pin_get_list *rsp) for (i = 0; i < rsp->obj.n_esync_frequency_supported; i++) dpll_frequency_range_free(&rsp->obj.esync_frequency_supported[i]); free(rsp->obj.esync_frequency_supported); + for (i = 0; i < rsp->obj.n_reference_sync; i++) + dpll_reference_sync_free(&rsp->obj.reference_sync[i]); + free(rsp->obj.reference_sync); free(rsp); } } @@ -1063,6 +1143,9 @@ void dpll_pin_get_ntf_free(struct dpll_pin_get_ntf *rsp) for (i = 0; i < rsp->obj.n_esync_frequency_supported; i++) dpll_frequency_range_free(&rsp->obj.esync_frequency_supported[i]); free(rsp->obj.esync_frequency_supported); + for (i = 0; i < rsp->obj.n_reference_sync; i++) + dpll_reference_sync_free(&rsp->obj.reference_sync[i]); + free(rsp->obj.reference_sync); free(rsp); } @@ -1078,6 +1161,9 @@ void dpll_pin_set_req_free(struct dpll_pin_set_req *req) for (i = 0; i < req->n_parent_pin; i++) dpll_pin_parent_pin_free(&req->parent_pin[i]); free(req->parent_pin); + for (i = 0; i < req->n_reference_sync; i++) + dpll_reference_sync_free(&req->reference_sync[i]); + free(req->reference_sync); free(req); } @@ -1108,6 +1194,8 @@ int dpll_pin_set(struct ynl_sock *ys, struct dpll_pin_set_req *req) ynl_attr_put_s32(nlh, DPLL_A_PIN_PHASE_ADJUST, req->phase_adjust); if (req->_present.esync_frequency) ynl_attr_put_u64(nlh, DPLL_A_PIN_ESYNC_FREQUENCY, req->esync_frequency); + for (unsigned int i = 0; i < req->n_reference_sync; i++) + dpll_reference_sync_put(nlh, DPLL_A_PIN_REFERENCE_SYNC, &req->reference_sync[i]); err = ynl_exec(ys, nlh, &yrs); if (err < 0) diff --git a/home/nipa/nipa_out/953676/ynl/old-code/dpll-user.h b/home/nipa/nipa_out/953676/ynl/new-code/dpll-user.h index e94cc10f41a4..0c6cb4f23a31 100644 --- a/home/nipa/nipa_out/953676/ynl/old-code/dpll-user.h +++ b/home/nipa/nipa_out/953676/ynl/new-code/dpll-user.h @@ -64,6 +64,16 @@ struct dpll_pin_parent_pin { enum dpll_pin_state state; }; +struct dpll_reference_sync { + struct { + __u32 id:1; + __u32 state:1; + } _present; + + __u32 id; + enum dpll_pin_state state; +}; + /* ============== DPLL_CMD_DEVICE_ID_GET ============== */ /* DPLL_CMD_DEVICE_ID_GET - do */ struct dpll_device_id_get_req { @@ -390,6 +400,8 @@ struct dpll_pin_get_rsp { unsigned int n_esync_frequency_supported; struct dpll_frequency_range *esync_frequency_supported; __u32 esync_pulse; + unsigned int n_reference_sync; + struct dpll_reference_sync *reference_sync; }; void dpll_pin_get_rsp_free(struct dpll_pin_get_rsp *rsp); @@ -474,6 +486,8 @@ struct dpll_pin_set_req { struct dpll_pin_parent_pin *parent_pin; __s32 phase_adjust; __u64 esync_frequency; + unsigned int n_reference_sync; + struct dpll_reference_sync *reference_sync; }; static inline struct dpll_pin_set_req *dpll_pin_set_req_alloc(void) @@ -546,6 +560,15 @@ dpll_pin_set_req_set_esync_frequency(struct dpll_pin_set_req *req, req->_present.esync_frequency = 1; req->esync_frequency = esync_frequency; } +static inline void +__dpll_pin_set_req_set_reference_sync(struct dpll_pin_set_req *req, + struct dpll_reference_sync *reference_sync, + unsigned int n_reference_sync) +{ + free(req->reference_sync); + req->reference_sync = reference_sync; + req->n_reference_sync = n_reference_sync; +} /* * Set attributes of a target pin