WARNING: line length of 96 exceeds 80 columns
#120: FILE: drivers/net/phy/as21xxx.c:20:
+#define   VEND1_GLB_CPU_CTRL_LED_POLARITY(_n) FIELD_PREP(VEND1_GLB_CPU_CTRL_LED_POLARITY_MASK, \

WARNING: line length of 83 exceeds 80 columns
#160: FILE: drivers/net/phy/as21xxx.c:60:
+#define IPC_CMD_BULK_DATA		0xa  /* Pass bulk data in ipc registers. */

WARNING: line length of 84 exceeds 80 columns
#162: FILE: drivers/net/phy/as21xxx.c:62:
+#define IPC_CMD_CFG_PARAM		0x1a /* Write config parameters to memory */

WARNING: line length of 82 exceeds 80 columns
#164: FILE: drivers/net/phy/as21xxx.c:64:
+#define IPC_CMD_TEMP_MON		0x15 /* Temperature monitoring function */

WARNING: line length of 82 exceeds 80 columns
#172: FILE: drivers/net/phy/as21xxx.c:72:
+#define   AEON_IPC_STS_STATUS_RCVD	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x1)

WARNING: line length of 82 exceeds 80 columns
#173: FILE: drivers/net/phy/as21xxx.c:73:
+#define   AEON_IPC_STS_STATUS_PROCESS	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x2)

WARNING: line length of 82 exceeds 80 columns
#174: FILE: drivers/net/phy/as21xxx.c:74:
+#define   AEON_IPC_STS_STATUS_SUCCESS	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x4)

WARNING: line length of 82 exceeds 80 columns
#175: FILE: drivers/net/phy/as21xxx.c:75:
+#define   AEON_IPC_STS_STATUS_ERROR	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x8)

WARNING: line length of 82 exceeds 80 columns
#176: FILE: drivers/net/phy/as21xxx.c:76:
+#define   AEON_IPC_STS_STATUS_BUSY	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xe)

WARNING: line length of 82 exceeds 80 columns
#177: FILE: drivers/net/phy/as21xxx.c:77:
+#define   AEON_IPC_STS_STATUS_READY	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xf)

WARNING: line length of 85 exceeds 80 columns
#396: FILE: drivers/net/phy/as21xxx.c:296:
+static int aeon_firmware_boot(struct phy_device *phydev, const u8 *data, size_t size)

WARNING: line length of 89 exceeds 80 columns
#411: FILE: drivers/net/phy/as21xxx.c:311:
+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_ADDRCMD,

WARNING: line length of 87 exceeds 80 columns
#416: FILE: drivers/net/phy/as21xxx.c:316:
+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_STATUS);

WARNING: line length of 83 exceeds 80 columns
#418: FILE: drivers/net/phy/as21xxx.c:318:
+		phydev_err(phydev, "wrong origin mdio_indirect_status: %x\n", val);

WARNING: line length of 99 exceeds 80 columns
#426: FILE: drivers/net/phy/as21xxx.c:326:
+		ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_LOAD, val);

WARNING: line length of 93 exceeds 80 columns
#431: FILE: drivers/net/phy/as21xxx.c:331:
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_RESET_ADDR_LO_BASEADDR,

WARNING: line length of 93 exceeds 80 columns
#436: FILE: drivers/net/phy/as21xxx.c:336:
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_RESET_ADDR_HI_BASEADDR,

WARNING: line length of 83 exceeds 80 columns
#471: FILE: drivers/net/phy/as21xxx.c:371:
+static inline int aeon_ipcs_wait_cmd(struct phy_device *phydev, bool parity_status)

WARNING: line length of 84 exceeds 80 columns
#479: FILE: drivers/net/phy/as21xxx.c:379:
+	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, VEND1_IPC_STS, val,

WARNING: line length of 96 exceeds 80 columns
#480: FILE: drivers/net/phy/as21xxx.c:380:
+					 FIELD_GET(AEON_IPC_STS_PARITY, val) == parity_status &&

WARNING: line length of 99 exceeds 80 columns
#481: FILE: drivers/net/phy/as21xxx.c:381:
+					 (val & AEON_IPC_STS_STATUS) != AEON_IPC_STS_STATUS_RCVD &&

WARNING: line length of 102 exceeds 80 columns
#482: FILE: drivers/net/phy/as21xxx.c:382:
+					 (val & AEON_IPC_STS_STATUS) != AEON_IPC_STS_STATUS_PROCESS &&

WARNING: line length of 97 exceeds 80 columns
#483: FILE: drivers/net/phy/as21xxx.c:383:
+					 (val & AEON_IPC_STS_STATUS) != AEON_IPC_STS_STATUS_BUSY,

WARNING: line length of 82 exceeds 80 columns
#484: FILE: drivers/net/phy/as21xxx.c:384:
+					 AEON_IPC_DELAY, AEON_IPC_TIMEOUT, false);

WARNING: line length of 87 exceeds 80 columns
#557: FILE: drivers/net/phy/as21xxx.c:457:
+		phydev_err(phydev, "failed to send ipc msg for %x: %d\n", opcode, ret);

total: 0 errors, 25 warnings, 0 checks, 1010 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 73f3785de0d1 ("net: phy: Add support for Aeonsemi AS21xxx PHYs") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 25 warnings, 0 checks, 1010 lines checked