WARNING: line length of 96 exceeds 80 columns #108: FILE: drivers/net/phy/as21xxx.c:20: +#define VEND1_GLB_CPU_CTRL_LED_POLARITY(_n) FIELD_PREP(VEND1_GLB_CPU_CTRL_LED_POLARITY_MASK, \ WARNING: line length of 84 exceeds 80 columns #129: FILE: drivers/net/phy/as21xxx.c:41: +#define VEND1_LED_REG_A_EVENT_ON_10 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x0) WARNING: line length of 85 exceeds 80 columns #130: FILE: drivers/net/phy/as21xxx.c:42: +#define VEND1_LED_REG_A_EVENT_ON_100 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x1) WARNING: line length of 86 exceeds 80 columns #131: FILE: drivers/net/phy/as21xxx.c:43: +#define VEND1_LED_REG_A_EVENT_ON_1000 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x2) WARNING: line length of 86 exceeds 80 columns #132: FILE: drivers/net/phy/as21xxx.c:44: +#define VEND1_LED_REG_A_EVENT_ON_2500 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x3) WARNING: line length of 86 exceeds 80 columns #133: FILE: drivers/net/phy/as21xxx.c:45: +#define VEND1_LED_REG_A_EVENT_ON_5000 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x4) WARNING: line length of 87 exceeds 80 columns #134: FILE: drivers/net/phy/as21xxx.c:46: +#define VEND1_LED_REG_A_EVENT_ON_10000 FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x5) WARNING: line length of 87 exceeds 80 columns #135: FILE: drivers/net/phy/as21xxx.c:47: +#define VEND1_LED_REG_A_EVENT_ON_FE_GE FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x6) WARNING: line length of 84 exceeds 80 columns #136: FILE: drivers/net/phy/as21xxx.c:48: +#define VEND1_LED_REG_A_EVENT_ON_NG FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x7) WARNING: line length of 93 exceeds 80 columns #137: FILE: drivers/net/phy/as21xxx.c:49: +#define VEND1_LED_REG_A_EVENT_ON_FULL_DUPLEX FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x8) WARNING: line length of 91 exceeds 80 columns #138: FILE: drivers/net/phy/as21xxx.c:50: +#define VEND1_LED_REG_A_EVENT_ON_COLLISION FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x9) WARNING: line length of 87 exceeds 80 columns #139: FILE: drivers/net/phy/as21xxx.c:51: +#define VEND1_LED_REG_A_EVENT_BLINK_TX FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xa) WARNING: line length of 87 exceeds 80 columns #140: FILE: drivers/net/phy/as21xxx.c:52: +#define VEND1_LED_REG_A_EVENT_BLINK_RX FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xb) WARNING: line length of 88 exceeds 80 columns #141: FILE: drivers/net/phy/as21xxx.c:53: +#define VEND1_LED_REG_A_EVENT_BLINK_ACT FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xc) WARNING: line length of 86 exceeds 80 columns #142: FILE: drivers/net/phy/as21xxx.c:54: +#define VEND1_LED_REG_A_EVENT_ON_LINK FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xd) WARNING: line length of 96 exceeds 80 columns #143: FILE: drivers/net/phy/as21xxx.c:55: +#define VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_ACT FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xe) WARNING: line length of 95 exceeds 80 columns #144: FILE: drivers/net/phy/as21xxx.c:56: +#define VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_RX FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0xf) WARNING: line length of 98 exceeds 80 columns #145: FILE: drivers/net/phy/as21xxx.c:57: +#define VEND1_LED_REG_A_EVENT_ON_FE_GE_BLINK_ACT FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x10) WARNING: line length of 95 exceeds 80 columns #146: FILE: drivers/net/phy/as21xxx.c:58: +#define VEND1_LED_REG_A_EVENT_ON_NG_BLINK_ACT FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x11) WARNING: line length of 97 exceeds 80 columns #147: FILE: drivers/net/phy/as21xxx.c:59: +#define VEND1_LED_REG_A_EVENT_ON_NG_BLINK_FE_GE FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x12) WARNING: line length of 101 exceeds 80 columns #148: FILE: drivers/net/phy/as21xxx.c:60: +#define VEND1_LED_REG_A_EVENT_ON_FD_BLINK_COLLISION FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x13) WARNING: line length of 85 exceeds 80 columns #149: FILE: drivers/net/phy/as21xxx.c:61: +#define VEND1_LED_REG_A_EVENT_ON FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x14) WARNING: line length of 85 exceeds 80 columns #150: FILE: drivers/net/phy/as21xxx.c:62: +#define VEND1_LED_REG_A_EVENT_OFF FIELD_PREP_CONST(VEND1_LED_REG_A_EVENT, 0x15) WARNING: line length of 83 exceeds 80 columns #171: FILE: drivers/net/phy/as21xxx.c:83: +#define IPC_CMD_BULK_DATA 0xa /* Pass bulk data in ipc registers. */ WARNING: line length of 84 exceeds 80 columns #173: FILE: drivers/net/phy/as21xxx.c:85: +#define IPC_CMD_CFG_PARAM 0x1a /* Write config parameters to memory */ WARNING: line length of 82 exceeds 80 columns #175: FILE: drivers/net/phy/as21xxx.c:87: +#define IPC_CMD_TEMP_MON 0x15 /* Temperature monitoring function */ WARNING: line length of 82 exceeds 80 columns #183: FILE: drivers/net/phy/as21xxx.c:95: +#define AEON_IPC_STS_STATUS_RCVD FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x1) WARNING: line length of 82 exceeds 80 columns #184: FILE: drivers/net/phy/as21xxx.c:96: +#define AEON_IPC_STS_STATUS_PROCESS FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x2) WARNING: line length of 82 exceeds 80 columns #185: FILE: drivers/net/phy/as21xxx.c:97: +#define AEON_IPC_STS_STATUS_SUCCESS FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x4) WARNING: line length of 82 exceeds 80 columns #186: FILE: drivers/net/phy/as21xxx.c:98: +#define AEON_IPC_STS_STATUS_ERROR FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x8) WARNING: line length of 82 exceeds 80 columns #187: FILE: drivers/net/phy/as21xxx.c:99: +#define AEON_IPC_STS_STATUS_BUSY FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xe) WARNING: line length of 82 exceeds 80 columns #188: FILE: drivers/net/phy/as21xxx.c:100: +#define AEON_IPC_STS_STATUS_READY FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xf) WARNING: line length of 85 exceeds 80 columns #358: FILE: drivers/net/phy/as21xxx.c:270: +static int aeon_firmware_boot(struct phy_device *phydev, const u8 *data, size_t size) WARNING: line length of 89 exceeds 80 columns #373: FILE: drivers/net/phy/as21xxx.c:285: + ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_ADDRCMD, WARNING: line length of 87 exceeds 80 columns #378: FILE: drivers/net/phy/as21xxx.c:290: + val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_STATUS); WARNING: line length of 83 exceeds 80 columns #380: FILE: drivers/net/phy/as21xxx.c:292: + phydev_err(phydev, "wrong origin mdio_indirect_status: %x\n", val); WARNING: line length of 99 exceeds 80 columns #388: FILE: drivers/net/phy/as21xxx.c:300: + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_MDIO_INDIRECT_LOAD, val); WARNING: line length of 93 exceeds 80 columns #393: FILE: drivers/net/phy/as21xxx.c:305: + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_RESET_ADDR_LO_BASEADDR, WARNING: line length of 93 exceeds 80 columns #398: FILE: drivers/net/phy/as21xxx.c:310: + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_RESET_ADDR_HI_BASEADDR, WARNING: line length of 83 exceeds 80 columns #469: FILE: drivers/net/phy/as21xxx.c:381: + ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, VEND1_IPC_STS, val, WARNING: line length of 87 exceeds 80 columns #507: FILE: drivers/net/phy/as21xxx.c:419: + phydev_err(phydev, "failed to send ipc msg for %x: %d\n", opcode, ret); total: 0 errors, 41 warnings, 0 checks, 871 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. Commit c28a9719e430 ("net: phy: Add support for new Aeonsemi PHYs") has style problems, please review. NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT BAD_REPORTED_BY_LINK CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 41 warnings, 0 checks, 871 lines checked